Observed Signal · Jul 23, 2026 · Technical Analysis · Source: SemiAnalysis · Impact: 4/5 · Sentiment: Positive
NVIDIA Vera Rubin NVL72 Inference TCO Analysis
SemiAnalysis analyzes early engineering-sample metrics and architectural changes for NVIDIA's Vera Rubin NVL72 (Oberon SM_107) and compares its inference performance and total cost of ownership (TCO) against GB200 and GB300 NVL72 baselines. CoreWeave-reported results using DeepSeek R1 show large per-MW and per-dollar gains (CoreWeave claims ~5.4x per-MW and ~5x per-dollar vs a 2025 GB200 baseline), but SemiAnalysis highlights benchmarking nuances: different baselines (2025 vs 2026), single-turn workloads, pre-production rack hardware, and unverified metrics. Rubin's architectural changes include larger SMEM/TMEM configurations, inline TMA descriptor overrides, doubled FP8/FP4 tensor throughput, 2:4 activation sparsity, a 3-bit LUT B tensor-core decompression mode, and 3D-stacked HBM4 giving ~2.8x global memory bandwidth versus Blackwell. SemiAnalysis reports Rubin TCO per GPU of $3.57 (operator ownership) versus $1.84 for GB200 and $2.36 for GB300, and notes NVIDIA plans to submit verifiable InferenceX numbers by Q3 CY2026.
Early Rubin architecture and benchmark claims from NVIDIA (a major platform) materially affect inference performance, power efficiency, and TCO for large-model deployments; these changes influence datacenter procurement, model deployment economics, and competitive benchmarking across GPU and accelerator vendors.
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Key Takeaways & Evidence Grounding
- Vera Rubin NVL72 is NVIDIA's second-generation rack-scale Oberon architecture (SM_107).
- CoreWeave reported Rubin delivering 5.4x performance per MW and ~5x performance per dollar over a 2025 GB200 NVL72 baseline using DeepSeek R1.
- SemiAnalysis reports Rubin TCO per GPU of $3.57 (operator ownership) versus $1.84 for GB200 and $2.36 for GB300 in their model.
- Rubin increases global memory bandwidth ~2.8x over Blackwell Ultra by using 3D-stacked HBM4 and adds features like 2:4 activation sparsity and a 3-bit LUT B tensor-core decompression mode.
- NVIDIA has upstreamed Rubin PRs to PyTorch, vLLM and the OpenAI Triton Compiler and released a Rubin (SM_107) software stack preview with CUDA 13.4.
Connected Companies & Entities
7 Entities mapped“Vera Rubin NVL72 is the second generation of Nvidia’s rack-scale Oberon architecture, and its gains on inference come from extreme co-design...”
“The early metrics gathered on VR NVL72 come from CoreWeave....”
“In this article we break down Nvidia's Rubin claims against several baselines, showing where Rubin clearly leads Blackwell and where the lea...”
“Google should submit TPUv7 results in the next couple of months, and AMD has committed to MI455X UALoE72....”
“Specifically, CoreWeave used a Dell Engineering Sample (ES) rack....”
“Google should submit TPUv7 results in the next couple of months, and AMD has committed to MI455X UALoE72....”
“Nvidia has upstreamed Rubin PRs to PyTorch, vLLM and OpenAI Triton Compiler....”
Ontology Mapping & Concepts
Related Market Signals & Shifts
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Rubin NVL72 Agentic Inference: 67x Better Performance per Dollar
SemiAnalysis reports first verified agentic inference results for NVIDIA's Rubin NVL72 platform using their AgentX benchmark. Even on early pre-release software, Rubin delivers up to 67x better performance per dollar of TCO compared to GB300 in certain configurations, and significantly higher throughput per MW. The analysis projects Rubin can generate over 2x more profit per gigawatt than Blackwell, with revenue and profit advantages of 39% and 42% respectively at a fixed power budget. Dynamic power shifting (DSX MaxLPS) allows more GPUs per datacenter footprint. The article highlights Rubin's superiority over H200 and MI355X, with recommendations for inference providers to adopt Rubin for cost-efficient token generation.
Nvidia's Vera Rubin: 10x More Efficient AI System Unveiled
Nvidia unveiled details and gave CNBC a first look at Vera Rubin, a new rack-scale AI system it says will deliver roughly 10 times the performance per watt of its predecessor, Grace Blackwell. Vera Rubin is a modular, fully liquid‑cooled rack expected to ship in H2 2026; each rack contains 72 Rubin GPUs and 36 Vera CPUs and about 1.3 million components sourced from 80+ suppliers across 20+ countries. Nvidia says the design simplifies maintenance (hot‑swap superchips) and boosts energy efficiency despite higher absolute power draw. Major cloud and AI customers — including Meta (which committed to use Vera Rubin by 2027), OpenAI, Anthropic, Amazon, Google and Microsoft — are expected users. The article notes supply‑chain pressures on memory pricing, competitive pressure from AMD (Helios) and others, and Nvidia’s plan to manufacture large amounts of U.S. AI infrastructure through 2029.
NVIDIA GPU roadmap: A100 to Vera Rubin (2026)
This article explains NVIDIA's recent data-center GPU roadmap across four major architectures — Ampere (A100), Hopper (H100/H200), Blackwell (B200/B300), and Vera Rubin (R100) — and why each generation matters for AI infrastructure planning. It summarizes memory and interconnect improvements (HBM2e → HBM3/HBM3e → HBM4), precision formats (FP8 and new 4-bit NVFP4), and the move toward rack-scale designs (e.g., NVL72, NVL144). The piece highlights practical procurement implications: match hardware to bottlenecks (memory vs compute), plan facilities for power/cooling, consider renting vs owning, and re-run cost calculations each generation. Vera Rubin (R100) is expected to roll out in H2 2026, followed by Rubin Ultra (2027) and a new architecture codenamed Feynman (2028).
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