Observed Signal · Jul 7, 2026 · Technical Release · Source: Chipstrat · Impact: 4/5 · Sentiment: Positive
High‑Bandwidth Flash Emerges as AI Memory Option
The report analyzes High Bandwidth Flash (HBF), a stacked-NAND packaging approach that mimics HBM stacking (TSVs + bonded controller/CBA) to deliver very high read bandwidth ( ~1.6 TB/s) while offering substantially more capacity (Sandisk states ~512 GB per stack). HBF trades higher latency and lower write endurance for much greater capacity-per-stack versus HBM, making it a candidate for storing model weights for inference decode workloads. SanDisk expects memory samples in H2 2026 and AI inference devices using HBF in early 2027. Sandisk and SK Hynix are collaborating on stacking and began an OCP standardization effort in February 2026. The piece outlines supply-chain implications, comparative power/cost metrics versus HBM4, and competitive players including Sandisk, SK Hynix, Samsung and YMTC.
HBF could materially change AI inference infrastructure economics by offering HBM‑level bandwidth with ~10x capacity per stack, affecting memory demand, GPU counts, interconnect and total cost-per-token for large models.
Track Sandisk Signals & Market Shifts in Real-Time
Polaris7 autonomous intelligence agents track regulatory filings, primary sources, executive changes, and deal flow 24/7. Create your free Explorer workspace to monitor these entities.
Key Takeaways & Evidence Grounding
- HBF stacks 16 NAND dies connected with through‑silicon vias (TSVs) and bonds a controller logic die onto the array (CBA).
- The HBF stack delivers about 1.6 TB/s of read bandwidth — comparable to an HBM4 stack at the JEDEC 6.4 Gb/s operating point.
- Sandisk states an HBF stack can provide roughly 512 GB of capacity per stack (8–16x the capacity of HBM4 depending on generation).
- SanDisk expects first memory samples in the second half of 2026 and samples of AI inference devices built with HBF in early 2027.
- SanDisk and SK Hynix began an OCP standardization effort for HBF in February 2026.
Connected Companies & Entities
4 Entities mapped“SanDisk also claims a [similar cost to an HBM stack] despite 8-16x the capacity, which works out to roughly 10x lower cost per GB....”
“So SK Hynix is the stacking partner....”
“Competitive landscape: Sandisk, SK Hynix, Samsung, YMTC...”
“[Paid] Nvidia is the certification gate; custom silicon moves first...”
Ontology Mapping & Concepts
Related Market Signals & Shifts
Recent verified developments and strategic activity across this market segment.
Samsung Ships HBM4E AI Memory Chip Samples
Samsung Electronics said it has begun shipping global samples of its next‑generation high‑bandwidth memory, the 12‑layer HBM4E, prompting shares to rise as much as 6.51%. Samsung described the HBM4E as an industry first, capable of speeds up to 16 gigabits per second with improved energy efficiency and thermal performance. The 12‑layer HBM4E offers 48 GB capacity — more than a 30% increase versus the prior generation — and Samsung plans additional 8‑layer 32 GB and 16‑layer 64 GB configurations depending on customer needs. The company previously began shipping HBM4 in February as it competes with peers such as SK Hynix and Micron in next‑generation AI memory. Sang Joon Hwang, Samsung’s executive vice president and head of memory development, commented on the company’s manufacturing investments to grow the AI memory market.
AI Memory Tax and Bifurcation of Scaling Laws
The article argues that memory has shifted from a commoditized, cyclical component to a strategic bottleneck for AI infrastructure. Two drivers explain this change: the longstanding "memory wall" problem identified by Wulf and McKee (1995), and the accidental emergence of High Bandwidth Memory (HBM) — co-developed by AMD and SK hynix and adopted by NVIDIA — as a critical enabler for transformer workloads. Transformers' extreme memory-bandwidth demands have elevated HBM's importance, concentrated market power among a few suppliers, and produced sustained tight supply and high margins. The author frames this as a regime change with cascading implications for AI system design, product roadmaps, and silicon markets, and promises deeper analysis of products, ownership, and infrastructure consequences.
Nvidia Builds Custom AI Memory NVHBM
Nvidia has developed NVHBM, a custom variant of HBM4 (High Bandwidth Memory) that relocates the memory controller into the base-die of the stacked memory. The design reduces the need for a controller on the CPU, GPU, or a separate I/O die and uses small NVLink interfaces as the connection method, forming part of Nvidia's NVLink Fusion platform. Nvidia positions NVHBM as a way to tie partners into its ecosystem while limiting the cross-vendor Compute Express Link (CXL) standard. Various memory manufacturers are evaluating NVHBM, and Annapurna Labs (Amazon's semiconductor subsidiary) is reported as the first partner to adopt the technology.
Track Real-Time Market Signals & Shifts
Set up custom watchlists to receive automated, evidence-grounded executive digests whenever material signals or shifts occur across your tracked landscape.